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Texas Instruments MSPM0G351x-Q1 Mixed-Signal MCUs

Texas Instruments MSPM0G351x-Q1 Mixed-Signal MCUs are a part of the MSP highly integrated, ultra-low-power 32-bit MCU family based on the enhanced Arm®. These MCUs are Arm® Cortex®-M0+ 32-bit core platform that operates at up to 80MHz frequency. The MSPM0G351x-Q1 mixed-signal MCUs offer design flexibility for applications that require 256KB to 512KB of flash memory in small packages. These devices include dual CAN-FD controllers, cybersecurity enablers, and high-performance integrated analog, providing excellent low-power performance across the operating temperature range. The MSPM0G351x-Q1 devices are AEC-Q100 qualified for automotive applications. These MCUs are ideal for automotive body electronics and lighting, automotive gateway, steering wheel systems, automotive motor control, DC to AC inverters, and door handle modules.

Features

  • Core Arm® 32-bit Cortex® M0+ CPU with memory protection unit, frequency up to 80MHz
  • Functional safety-compliant targeted:
    • Developed for functional safety applications
    • Documentation to aid ISO 26262 system design will be available
    • Systematic capability up to ASIL B targeted
  • PSA-L1 Certification targeted
  • Operating characteristics:
    • -40°C up to 125°C extended temperature range
    • 1.62V to 3.6V wide supply voltage range
  • Memories:
    • Up to 512KB of flash memory with Error Correction Code (ECC):
      • Dual-bank with address swap for OTA updates
    • 16KB data flash bank with ECC protection
    • 128KB total SRAM
      • 64kB SRAM with ECC protection or hardware parity, and retention down to STANDBY mode SRAM (Bank 0)
      • 64kB SRAM with retention down to STOP mode SRAM (Bank 1)
  • High-performance analog peripherals:
    • Two simultaneous sampling 12-bit 4Msps analog-to-digital converters (ADC) with up to 27 external channels
      • 14-bit effective resolution at 250ksps with hardware averaging
    • Three high-speed comparators (COMP) with integrated 8-bit reference DACs
      • 32ns propagation delay in high-speed mode
      • Support low-power mode operation down to <1µA
    • One 12-bit 1Msps Digital-to-Analog Converter (DAC) with integrated output buffer
    • Programmable analog connections between ADC, COMP, and DAC
    • Configurable 1.4V or 2.5V internal shared voltage reference (VREF)
    • Integrated temperature sensor
  • Optimized low-power modes:
    • RUN: 123µA/MHz (CoreMark)
    • SLEEP: 38µA/MHz
    • STOP: 223µA at 4MHz
    • STANDBY: 1.7µA at 32kHz with RTC and SRAM Bank 0 and state retention
    • SHUTDOWN: 92nA with IO wake-up capability
  • 2-pin Serial Wire Debug (SWD) development support
  • Package options:
    • 100-pin LQFP (PZ) (0.5mm pitch)
    • 80-pin LQFP (PN) (0.5mm pitch)
    • 64-pin LQFP (PM) (0.5mm pitch)
    • 48-pin LQFP (PT) (0.5mm pitch)
    • 48-pin VQFN (RGZ) (0.5mm pitch, wettable flank)
    • 32-pin VQFN (RHB) (0.5mm pitch, wettable flank)
  • Intelligent digital peripherals:
    • 12-channel DMA controller
    • Math accelerator supports DIV, SQRT, MAC, and TRIG computations
    • Nine timers support up to 28 PWM channels:
      • Two 16-bit general-purpose timers support QEI
      • Four 16-bit general-purpose timers support low-power operation in STANDBY mode
      • One 32-bit general-purpose timer
      • Two 16-bit advanced timers with deadband support and complimentary outputs up to 12 PWM channels
    • Two windowed watchdog timers (WWDT), one independent watchdog timer (IWDT)
    • RTC with alarm and calendar mode
  • Enhanced communication interfaces:
    • Seven UART interfaces:
      • Two supporting LIN, IrDA, DALI, Smart Card, Manchester
      • Three supporting low-power operation in STANDBY mode
    • Three I2C interfaces supporting up to FM+ (1Mbit/s), SMBus/PMBus, and wakeup from STOP mode
    • Three SPI interfaces, with one supporting up to 32Mbits/s
    • Two Controller Area Network (CAN) interfaces support CAN 2.0 A or B and CAN-FD
  • Clock system:
    • Internal 4MHz to 32MHz oscillator (SYSOSC) with up to ±1.2% accuracy
    • Phase-locked loop (PLL) up to 80MHz
    • Internal 32kHz low-frequency oscillator (LFOSC) with ±3% accuracy
    • External 4MHz to 48MHz crystal oscillator (HFXT)
    • External 32kHz crystal oscillator (LFXT)
    • External clock input
  • Data integrity and encryption:
    • AES-128/256 accelerator with support for GCM/ GMAC, CCM/CBC-MAC, CBC, and CTR
    • Secure key storage for up to four AES keys
    • Flexible firewalls for protecting code and data
    • True Random Number Generator (TRNG)
    • Cyclic Redundancy Checker (CRC-16 and CRC-32)
  • Flexible I/O features:
    • Up to 94 GPIOs:
      • Two 5V-tolerant open-drain IOs
      • Three high-drive IOs with 20mA drive strength
      • Four high-speed IOs
  • Family members (also see device comparison):
    • MSPM0G3518-Q1: 256KB flash, 128KB RAM
    • MSPM0G3519-Q1: 512KB flash, 128KB RAM
  • Development kits and software (also see tools and software):
    • LP-MSPM0G3519 LaunchPad™ development kit
    • MSPM0 Software Development Kit (SDK)
  • Automotive qualification:
    • AEC-Q100 Grade 1 (-40°C to 125°C)
    • Wettable flank for 32-pin and 48-pin VQFN options

Applications

  • Automotive body electronics and lighting
  • Automotive gateway
  • Steering wheel systems
  • Automotive motor control
  • DC to AC inverters
  • Automotive interior lighting
  • Door handle modules
  • Kick to open modules
  • Vehicle occupancy detection
  • Seat comfort module

Functional Block Diagram

Block Diagram - Texas Instruments MSPM0G351x-Q1 Mixed-Signal MCUs

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Publicado: 2025-12-09 | Actualizado: 2025-12-16