NXP Semiconductors PCA9616 3-Channel Buffer
NXP Semiconductor PCA9616 3-Channel Multipoint Differential I2C-bus Buffer is a Fast-mode Plus (Fm+) SMBus/I2C-bus buffer that extends the normal single-ended SMBus/I2C-bus through electrically noisy environments using a differential SMBus/I2C-bus (dI2C) physical layer, which is transparent to the SMBus/I2C-bus protocol layer. PCA9616 consists of three single-ended to differential driver channels for the SCL (serial clock), SDA (serial data), and a third channel useful for INT or another signaling. Additional circuitry allows the NXP PCA9616 to be used for 'hot swap' applications, where systems are always on but require insertion or removal of modules or cards without disruption to existing signals. The dI2C-bus buffers are ideally suited for rugged high noise environments and/or longer cable applications, allow multiple slaves, and operate at bus speeds up to 1MHz clock rate.
Features
- New dI2C-bus buffers offer improved resistance to system noise and ground offset up to 1⁄2 of supply voltage
- Hot-swap (allows insertion or removal of modules or card without disruption to bus data)
- READY signal (PCA9616 output) indicates the device is ready from a cold start
- EN signal (PCA9616 input) controls PCA9616 hot-swap sequence
- Bus idle detect (PCA9616 internal function) waits for a bus idle condition before the connection is made
- 3 channel dI2C (differential I2C-bus) to Fm+ single-ended buffer operating up to 1MHz with 30mA SDA/SCL > 2.2V, or 3mA SDA/SCL < 2.4V
- Compatible with I2C-bus Standard/Fast-mode and SMBus, Fast-mode Plus up to 1MHz
- Active HIGH (internal pull-up resistor) Enable disables the device to a high-impedance state
- Single-ended I2C-bus on card side up to 540pF > 2.2V and 400pF < 2V
- Differential I2C-bus on cable side supporting multi-drop bus
- Maximum cable length: 3m (approximately 10 feet) (longer at lower frequency)
- dI2C output: 1.5V differential output with nominal terminals
- Differential line impedance (user-defined): 100Ω nominal suggested
- Receive input sensitivity: ±200mV
- Hysteresis: ±30mV typical
- Input impedance: high-impedance (200kΩ typical)
- Receive input voltage range: 0.5V to +5.5V
- Lock-up free operation
- Supports arbitration and clock stretching across the dI2C-bus buffers
- Powered-off and powering-up high-impedance I2C-bus pins
- Operating supply voltage (VDD(A)) range of 0.8V to 5.5V with single-ended side 5.5V tolerant
- Differential I2C-bus operating supply voltage (VDD(B)) range of 3.0V to 5.5V, with 5.5V tolerant (the best operation is at 5V)
- ESD protection exceeds 2000V HBM per JESD22-A114 and 1000V CDM per JESD22-C101
- Latch-up testing is done to JEDEC Standard JESD78, which exceeds 100mA
- Package offering: TSSOP16
Applications
- Any application with multiple power supplies and the potential for ground offsets up to 2.5V
- Any application that requires long IC-bus runs in electrically noisy environments
- Monitor remote temperature/leak detectors in harsh environment with interrupt back to master
- Control of power supplies in high noise environment
- Transmission of I2C-bus between equipment cabinets
- Commercial lighting and industrial heating/cooling control
Block Diagram
Publicado: 2015-01-16
| Actualizado: 2022-03-11